After 1 year, the project has successfully started and is in line with the initial planning
Thanks to excellent cooperation within the consortium, high level results were achieved, leading to more than 20 papers in journals/conferences
The work during the first year of the project has been started readily after the start in all the workpackages. Focus was given on refining the specifications on the different demonstrators and setting a state of the art report in order to level the consortium to a common understanding of the technical situation in silicon photonics. A first version of HELIOS roadmap and a first version of the exploitation plan were established. On QAM demonstrator, application scenario and preliminary exploitation plan were completed. The system performance optimization was performed.
On hybrid source development, design was completed and first fabrication with SOI-waveguide circuits and III-V epitaxial layers were started. ITO molecular bonding was proven on full wafers and first CMOS compatible contacts showed ohmic behaviour on InP layers. The test vehicle for reliability studies was defined
Silicon modulators studies were divided in two designs differentiated by the thickness of the silicon layer. A thin lateral PIN modulator was designed and fabricated with estimated bandwidth performance exceeding the 10GHz objective. A thick lateral PIN modulator was designed with more than 10GHz bandwidth and the fabrication process started.
View of the output of the MZI of a thin modulator
Slow wave structure have been designed and fabricated. For thin modulator option, a slow-wave corrugated waveguide for the thin modulator have been designed and fabricated. It has been shown that size and power could be up to 5 times smaller than in the conventional rib modulator with moderate slow group velocities of around 0.06c. Group velocities as low as 0.014c for wavelengths around 1550nm in corrugated waveguides fabricated with conventional CMOS tools was experimentally demonstrated
For thick modulator, the design of ring resonator structures for the thick overlayer phase modulator shows extinction ratios up to 30dB with only 1V and a modulator length lower than 100 µm.
Simulations on the integration and physical parameters of Ge and InGaAS photodetectors with waveguide were performed. Technological processes for bonding III-V photodetectors and for fabrication of Ge photodetectors were defined. The characterization of realized vertical and lateral PIN Ge and III-V MSM photodetectors were performed, showing low dark current, high optical responsivity and high optical bandwidth compatible with 40 Gb/s operation.
Top view of a vertical PIN Ge photodetector
An inverted taper coupling structure with 1dB coupling loss was experimentally demonstrated by CEA-LETI apart from Helios, but experimentally checked by the Helios partners. First experimental results of V-Groove coupling approach on design by UPVLC exhibited 6dB coupling loss. The design of inverted taper with polymer (SU8) waveguide on top by UPVLC is completed.
A transition between rib/strip waveguides has been designed and fabricated with less the 0.2dB measured losses.
Rib to stripe transition
A report on generic concepts for Silicon photonics packaging was issued with experimental verification of fiber coupler data (horizontal & vertical).
On the design flow part, the development of a blueprint for design methodology and flow were performed as well as the definition of hierarchical modelling levels and choice of modelling languages.
The concept for FEOL integration of photonics in IHP including technology development of silicon nano-waveguides and BICMOS process on SOI wa studied with application of FEOL integration concept to modulator flow. For front side integration of photonics on CMOS, the concepts were defined as well as the concept for backside integration based on proprietary ams TSV technology.
First electrical results were obtained on backside interconnect technology.
A first demonstration of light modulation in an a-Si:H/insulator thin multi-stack was obtained and optimization took place on the insulating layer technology and the definition of the buried contact technology.
Silicon nanocrystals for light emission and amplification layers were designed, fabricated, and characterized. First LEDs in visible and infrared were designed and process fabrication started with the optimized layers. Bipolar injection via direct tunnelling in nc-Si LED emitting in visible with power efficiency of 0.2% was demonstrated.
A broadband silicon photonic crystal based mirrors with a good tolerance to technological imperfections were designed and fabricated in the aim of getting compact 2.5D cavities with Q~10000 for III-V/Si microlaser and compact 2.5D cavity with Q~10000 for silicon-based light emitters. A first design of 2.5D cavities coupled to a silicon waveguide has been proposed
Schematic of a 1D silicon PhC mirror embedded in silica
Corresponding electric field distribution
A winter school on silicon photonics integration was organized for the training of students involved in the field. A project website www.helios-project.euhas been set up to disseminate the HELIOS results. More than 20 publications (in conference and peer-review journals) have been made by the HELIOS consortium during the first year.